FPGA Design

Visualization of a pipelined instance of the foldl function

1 bT
2 :: KnownNat n
3 => Vec (n+1) a
4 -> (a->a->a)
5 -> Vec (n+1) a
6 -> a
7 -> (Vec (n+1) a,a)
8 bT xs f rs a = (rs',o)
9 where
10 o = last rs'
11 rs' = zipWith f (a +>> rs) xs
12
13 -- Initialisation:
14 b
15 :: HiddenClockReset domain gated synchronous
16 => Num a
17 => Signal domain a
18 -> Signal domain a
19 b = mealy (bT (1:>2:>3:>Nil) (+)) (repeat 0)

“CλaSH is a real pleasure to use compared to VHDL. Being able to use Haskell’s strong type system really helps speed up development. Modules written in CλaSH are not only easier to maintain, but also easier to compose with one another.”

Joe Hermaszewski – Myrtle Software

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