Power of FPGA’s

Even though normal processors are very powerful and fast, they are too slow and consume too much energy when it comes to innovative and challenging applications. In such cases FPGA’s are a good alternative. Unfortunately, the overall experience is that current methods to program FPGA’s are complex and generate high costs. Often FPGA projects run out of time and out of budget.

QBayLogic offers a solution for this problem. But first let us understand why this problem shows itself to begin with. We start by watching the following video that demonstrates the differences between a regular CPU and an FPGA.

Difference between a CPU and an FPGA

In the video (watch YouTube version here) you see on the left a normal processor / CPU and on the right an FPGA. While we see that the CPU computes individual elements faster than the FPGA, the FPGA computes and moves data in bulk, thus delivering the final solution in a far shorter time. It also takes the FPGA far less energy to produce its results. Let’s first look a bit further into some remarkable differences between a CPU and an FPGA.

CPU: fixed and sequential

The architecture of a CPU is fixed, and its ALU (algorithmic and logic unit) can do a specific number of operations. A program that the CPU executes consists of a sequence of instructions which are stored in memory. These instructions are fetched from memory one after another, and they determine the behaviour of various parts of the CPU in a step-by-step fashion. This includes what data to read from memory, which register in the register bank to use, which operation in the ALU to apply, and where to put back the result. In addition, the communication with memory takes quite some time which may cause relatively long waiting times. In short, a CPU computes in a sequential way, and is confronted with severe inefficiencies.

FPGA: flexible and parallel

On an FPGA, on the other hand, all operations and registers are distributed over the FPGA. The computation that is performed is determined by how the operations and registers are distributed and how they are connected. It is the task of the designer / programmer to define this architecture for a specific computation. Unlike a CPU, all operations are executed at the same time, at each clock cycle. Not only are many computing steps done in parallel, they can also be done in a pipelined fashion as in an assembly line. As a final point we mention that an FPGA is flexible in the sense that later on, it can be re-configured for another application.


Result: there is no program on an FPGA

So it is obvious that an FPGA is (much) faster and (far) more energy efficient than a CPU. This makes FPGA’s attractive for computation intensive applications, or for applications that require large data streams. However, the most striking difference is the fact that on an FPGA there is no program. Instead, the functionality of an FPGA is determined by its architecture, that is to say, by the way operations and registers are connected together. Traditionally architectures are created using low-level hardware description languages (VHDL, Verilog), which offer few abstraction mechanisms and have low productivity. Strange enough though, to improve designer productivity, these days common practice still seems to be to use mainstream sequential languages, which were meant to program CPU’s, in order to try to define the parallel FPGA’s architectures.

Innovative QBayLogic approach

At QBayLogic we are convinced that mainstream languages are simply not suitable to express FPGA architectures. Our innovative approach is that we describe such an architecture purely by its functionality. This approach fits the nature of an FPGA remarkably well. As a bonus it also offers a fundamentally model-based methodology for ‘programming’ an FPGA. Based on that, we can boost the real power of FPGA’s in practice and subsequently deliver a solution for every automation challenge that rises within your businesses. Because of this we also stay within the agreed time and budget limits for your design projects.


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TOmCAT: Terabit laser communication


CAES case study: Tunelling ball device

An FPGA design house delivering "right the first time" solutions.

Design and realisation by:
Comyoo | creatieve studio


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