Formal Verification Engineer
PhD/MSc+
32 | 40 hours
Medior/Senior
As a formal verification engineer, you will play a crucial role in connecting existing verification technologies and methodologies with our Clash hardware design ecosystem and its mother language Haskell to be utilized for formal verification of hardware and software designs. While we realize everyone has their preferences and specializations, you are expected to work across the board, not shy away from technologies unknown to you and be at the office at least 2 days a week.




