QBayLogic has developed a powerful and flexible hardware description system, called Clash. This modern design system combines the advantages of mainstream methodologies and avoids their disadvantages (see below). In short, the Clash system offers:
– a high-level language to describe architecture by its functionality,
– a modern software environment to support the design process, and
– a compiler to generate low-level hardware descriptions (VHDL, Verilog) from which the actual hardware can be generated by using existing HDL tools (e.g. Quartus, Vivado).
Focus on functionality
Functionality is key in the Clash perspective, making Clash suitable to specify both the model of the application at hand, as well as the details of the architecture under design. That makes the design process with Clash fundamentally model based. That is to say, starting from the initial model all design steps are expressed in the same language, thereby guaranteeing the provability of the correctness of the design.
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The fully functional perspective of Clash fits digital hardware architectures in a natural way. It offers abstraction mechanisms for concise and precise descriptions, such as:
– structural patterns (using so called “higher order functions”),
– instruction sets for micro processors (by means of “domain specific embedded languages”, or “algebraic data types”), or
– generic constructs that occur in different situations (“polymorphic type mechanisms”).
Mechanisms such as these make Clash more adequate for hardware descriptions than so-called High Level Synthesis (HLS) tools.
Verification is greatly supported by the modern and powerful type system of Clash, which detects many errors already at compile time. Even accidentally mixing up signals from different clock domains is detected by the type system. In general, it allows designers to develop reusable components that communicate their intent clearly, and statically prevent illegal situations from ever occurring. There is no other design environment that offers the same power as Clash in type correctness.
Clash is integrated in a modern software environment that offers flexible working conditions, including editing support, a rich system of predefined libraries, and – above all – a readily available testing possibility. This latter point is extremely efficient in practice: a designer can quickly inspect, simulate, and debug a design interactively. Test inputs can be generated randomly, thereby avoiding “blind spots” in the design process. This increases the productivity, in comparison with a designer working directly in VHDL or (System)Verilog, enormously.
Another advantage of the Clash compiler is that it translates a design extremely quickly. For instance, the company Myrtle.ai (UK) has experienced that their deep neural network accelerator, MAU, compiles in less than 15 seconds. However, design changes can even be recompiled in less than a second.
After verifying a design thoroughly, the Clash compiler will then translate it into one of the existing low-level hardware languages (VHDL, Verilog) from which the actual hardware can be generated. An important advantage over more traditional high level synthesis tools is that the Clash compiler respects the structure that the designer has developed. This gives the designer detailed control over the performance of the resulting hardware. In contrast with common HLS tools, there are no hidden transformations in the Clash compiler. Thereby a time consuming, trial-and-error process of optimizations is avoided.
The foundation of QBayLogic in 2016 as an FPGA design house was based on our innovative Clash system, which was developed during more than ten years of fundamental research at the University of Twente (NL). It offers powerful and flexible mechanisms to define your own preferred components and frameworks, which are guaranteed.
Clash is fully open-source software and published on GitHub under BSD-2. This means you can look into its internals and freely modify it for your organization’s needs. Even more, several extensions to Clash are suggested and defined by experts all over the world, although the final responsibility for the system remains with QBayLogic.