Embedded software engineer

QBayLogic is hiring two to three embedded software engineers, at least one of them senior, for our bittide project. You’ll work with Martijn Bastiaan, team lead on the bittide project.

The project implements bittide’s clock control on a test vehicle board for a new PHY/SERDES. On each board, the PHY reports the phase difference between the received signal and the board’s internal PLL and/or external reference clock. Your firmware uses that measurement to adjust the external reference clock. Over 2027 the work grows from bring-up of a single board to a multi-board testbed. That testbed will demonstrate syntony (frequency agreement between nodes), gather frequency-deviation statistics, and show how the system behaves when links fail and recover.

The firmware runs on an NXP MCX N947 microcontroller and will be written in Rust (with C++ as a fallback). We work together with a PCB design partner, who is responsible for the board and for regular PHY operation. Your focus is the clock-control system. You’ll also be involved early: you’ll help specify the board, and later you’ll help find faults in it.

The schedule runs from Q4 2026 to Q4 2027, with a new firmware release roughly every quarter. The deadlines are tight and fixed. We need people who organise their own work, understand how their part fits into the whole, and keep an eye on the price of every decision. Attitude matters more to us than years of experience: if you have around two years of demonstrable experience doing this kind of work, we’d like to hear from you.

We start with a fixed-term contract, with the option to extend to a permanent position. Freelance or contracting arrangements are also possible.

Application deadline: October 31st, 2026

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MSc

32 | 40 hours

Medior/Senior

€43,908 – €91,160 gross per year

Fpga Solutions Defense Technology Development

What are you going to do?

The bittide project at QBayLogic is hiring embedded software engineers to build firmware for a new PHY/SERDES test board. The firmware measures phase differences on each link and steers the board’s reference clock to keep a multi-board system in syntony. You’ll help specify and bring up the hardware, design firmware that holds up on imperfect boards, and deliver a new firmware release every quarter against tight deadlines, working alongside partners in the Netherlands and the US.

Key responsibilities:
  • Working with our PCB partner on the board specification: MCU connectivity, firmware download and debug access.
  • Documenting the registers of the clock chip and PHY that the firmware relies on.
  • Taking the lead in choosing the lab equipment the project needs.
  • Writing and maintaining a test plan, from board bring-up to system-level testing.
  • Bringing up new boards and helping the PCB partner track down hardware faults.
  • Designing firmware defensively, so that it still produces useful results on boards that are partially broken or behave unexpectedly.
  • Developing and debugging four successive firmware versions:
    • v1: basic system operation and link performance testing.
    • v2: syntony.
    • v3: multi-board syntony with statistics gathering.
    • v4: a wall-clock proxy, which is exploratory.
  • Supporting our partners in BER testing and PHY tuning. Your firmware writes the PHY parameters and reads its status and measurement registers, while partners operate external test equipment.
  • Building tooling to load firmware and to retrieve statistics and performance metrics.
  • Running system tests, including link failure and recovery, and reporting the results clearly.
  • Planning your own work against the milestones, flagging risks early, and making trade-offs with schedule and cost in mind.
  • Travelling to our partner’s lab in the US roughly once per quarter, and staying until that release of the firmware works on their setup. How long a visit takes depends largely on you: good preparation and solid firmware mean shorter trips.

About you!

Who are you and what do you bring?

Required qualifications

  • Demonstrable experience with embedded software on microcontrollers, working close to the hardware.
  • Hands-on board bring-up experience, including debugging with lab equipment.
  • Proficiency in C/C++ with a willingness to learn Rust; Rust experience is a plus.
  • Comfortable reading schematics and datasheets well enough to review a board design and reason about hardware faults.
  • Experience writing test plans and testing systematically.
  • A self-organising way of working, and an understanding of how your work affects the project’s schedule and budget.
  • Fluent English, spoken and written.
  • Citizenship of the United States, or of an EEA or EFTA country that participates in the U.S. Visa Waiver Program.
  • Able to travel to the US about once per quarter: eligible to travel on an ESTA, or holding a US visa valid until at least the end of 2027.
  • Able to work on-site in Enschede for hardware debugging, or able to present a concrete plan for debugging remotely.

Preferred

  • Knowledge of SERDES and high-speed links.
  • Control theory.
  • Experience with DPLLs and DCOs.
Qbaylogic 1
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Qbl 3047hr

About us!

What do we have to offer you?

  • Salary up to € 91.160 per year, depending on competence
  • Company matched pension scheme
  • 31 days off
  • Yearly € 2,000 education/conference budget
  • Professional Dutch language course if desired by the candidate
  • Flexible home/office days
  • Challenging research projects

Our application process

During the application process, we want to keep it as personal as possible, as it suits us best. If you have any questions during the process, feel free to email or call us! Of course, it depends on other candidates and how easy it is to schedule, but we aim to keep the entire process from dragging on for too long.

1. The vacancy and apply

Of course, it all starts with the job vacancy. Does this one appeal to you? Then apply directly. Once we have received your application, we will contact you within a few working days for the next steps.

2. Seems promissing? You're invited

If we are impressed by your profile and background, we would like to invite you for a first interview. This will mainly be for getting to know each other, with two engineers from QBayLogic.

3. Second interview

If you are still enthusiastic after the first interview and we believe you are a good fit for QBayLogic, then we would like to invite you for a second round. In this round, we will delve deeper, and your technical knowledge will be tested. This interview will also be longer than the first round and usually comes with an assignment that must be completed beforehand.

4. Day at the office

If the second interview goes well, we invite you for a day in the office where you get to work on small task together with your prospective colleagues.

5. Starting at QBayLogic

If the day at the office is positive for both parties, then we would like to offer you a job. We will invite you again to discuss this and determine together when you can start.

Useful information for this vacancy

  • 32 to 40 hours
  • 31 days off
  • up to €91,160 gross per year
  • Company matched pension scheme
  • Yearly education/conference budget
  • Annual contract and prospect of permanent employment

Work situation

Where will you work?

QBayLogic B.V. is an innovative FPGA/ASIC design company that is Steward Owned. With over nine years of experience in FPGA engineering, we assist businesses in creating high-speed, energy-efficient implementations of complex algorithms.

Our expertise spans various domains, including embedded systems, AI, edge computing, and data centers. What sets us apart is our commitment to open-source development, with the Clash compiler being our flagship project.

At QBayLogic, you become part of a team of 20 people that embraces challenges and pushes boundaries. You’ll become part of a team of people who are incredibly passionate about what they are developing. In a supportive environment, we foster continuous growth and encourage employees to develop their skills in FPGA engineering and open-source software development.

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